Invited Paper PS-TuM12
Patterning Challenges and Perspective Solutions for 5nm and Beyond

Tuesday, October 31, 2017, 11:40 am, Room 23

Patterning has imposed new challenges and opportunities to Etch, Film metrology. In a variety of multiple patterning schemes, such as Multiple Litho + Etch (LELE…), or Self-Aligned Multiple Patterning (SAxP), Edge Replacement Error (EPE) is approaching the limit, ~¼ of pitch, which will limit the continuing of pitch shrink [1]. The recent development of EUV technology and manufacturability will help to realize much needed complementary lithography technology [2]. The challenges of reducing EPE (< e.g., ~ ¼ pitch), pitch walking, and CD/CDU/LER/LWR controllability in <0.5 nm (3s ) regime have shifted from Lithography to Films, Etch and Metrology. Continuous improvements of current plasma etch and film technologies are facing challenges to carry out the tasks of multiple patterning for the industry to extend to 5nm. Can process fine tuning based on current plasma etch and film tool technologies accomplish the precision requirement of fabricating sub-20nm pitch patterning? Atomic Layer Deposition (ALD) technology has already played a key in self-aligned multiple patterning. Further exploring on ALD and gapfill technology to provide more films with conformal and gapfill capabilities are required to enable some highly challenging patterning schemes. Conceptually, Atomic Layer Etching (ALE) should be able to help, e.g., CD control, etch selectivity, etc. But the key question is how to realize true ALE. In this talk, some of the new developments, key challenges, and perspective solutions on processes, process integrations, and plasma etching and film systems for will be reviewed and discussed.

[1] Richard Schenker, Intel, SPIE 2016, Feb, 2016, San Jose, USA

[2] Yan Borodovsky, Intel, Leti Innovation Days, June 26^th 2013, Grenoble, France