AVS 62nd International Symposium & Exhibition
    Plasma Science and Technology Tuesday Sessions
       Session PS-TuM

Invited Paper PS-TuM1
Interconnect Patterning in the EUV Era

Tuesday, October 20, 2015, 8:00 am, Room 210B

Session: Advanced BEOL/Interconnect Etching
Presenter: John Arnold, IBM Research Division, Albany, NY
Correspondent: Click to Email
The semiconductor industry is currently passing through a pivotal moment as EUV lithography transitions from patterning research to industrial-scale integrated technology development. This change will have ramifications far beyond the lithography itself, including impacts on adjacent unit processes, process complexity, development and manufacturing cycle times, product cost, and product yield, quality, and reliability. The most direct and immediate changes will be in plasma etch, where the combination of new materials and new dimensions will drive significant new challenges – and opportunities. The timing of EUV’s readiness for practical utilization is such that most of the initial applications will be at the wiring levels, both BEOL and MOL, and this presentation will focus on those. We will begin with an examination of EUV’s placement in the overall technology roadmap and a review of the important differences between EUV and conventional lithography. The bulk of the presentation will be dedicated to applications for contact, local interconnect, and BEOL, with particular emphasis on lithography and especially etch process behavior and performance. A discussion of the operational ramifications of incorporating EUV into a mainstream technology development program will be followed by a brief consideration of the anticipated benefits for the final manufactured products. We will conclude with a critical comparison of EUV to 193nm-based multiple patterning approaches for the 7nm node.

This work was performed by the Research and Development Alliance Teams at various IBM Research and Development facilities.