AVS 61st International Symposium & Exhibition
    Plasma Science and Technology Wednesday Sessions
       Session PS1-WeM

Paper PS1-WeM12
Surface Roughening Mechanisms and Roughness Suppression during Si Etching in Inductively Coupled Cl2 Plasmas

Wednesday, November 12, 2014, 11:40 am, Room 305

Session: Plasma Based Ion Implantation and Ion-Surface Interactions
Presenter: Nobuya Nakazaki, Kyoto University, Japan
Authors: N. Nakazaki, Kyoto University, Japan
H. Matsumoto, Kyoto University, Japan
K. Eriguchi, Kyoto University, Japan
K. Ono, Kyoto University, Japan
Correspondent: Click to Email

As ULSI device dimensions continue to be scaled down to << 100 nm, increasingly strict requirements are being imposed on plasma etching technology. The requirements include the precise control of profile, critical dimension, roughness, and their microscopic uniformity (or aspect-ration dependence), together with that of etch rate, selectivity, and damage. Atomic- or nanometer-scale surface roughness has become an important issue to be resolved in the fabrication of nanoscale devices, because the roughness at the feature bottom affects the uniformity of bottom surfaces, which in turn leads to a recess and thus a damage to transistors in gate fabrication. Moreover, the roughness on feature sidewalls is responsible for the line edge roughness (LER) and linewidth roughness (LWR), which affect the variability for gate or channel lengths and thus the variability in transistor performance. The formation of such surface roughness is stochastic and three dimensional, which are assumed to be affected by a number of factors during processing including plasma etching.

Experimental investigations of the surface roughness of planer substrate of Si etched in inductively coupled Cl2 plasmas have been performed, including several surface and plasma diagnostics, to gain a deeper understanding the mechanisms for surface roughening and then to find a way for suppressing the roughness during plasma etching. The experiments indicated that as the rf bias power or incident ion energy Ei is increased, the etch rate continues to increase, while the surface roughness increases and then substantially decreases at high Ei. In addition, the surface roughness at low Ei increases with etching time, while does not depend on etching time at high Ei. The analysis of the etch rate as a function of Ei and etching time, with the help of Fourier transform infrared (FTIR) absorption spectroscopy, quadrupole mass spectrometry (QMS), and classical molecular dynamics (MD) simulation, implied that by-product ions of silicon chlorides SiClx+, whose concentration is increased in the plasma at increased Ei, play a critical role in surface roughening as well as etching at increased Ei through competitive etching and deposition. [1,2] Moreover, the pulse-bias etching through a repetitive on/off of the rf bias power also have been demonstrated to be one promising way of reducing the surface roughness during plasma etching.

[1] H. Tsuda, N. Nakazaki, Y. Takao, K, Eriguchi, and K. Ono: J. Vac. Sci. Technol. B (2014) in press.

[2] N. Nakazaki, Y. Takao, K, Eriguchi, and K. Ono: Jpn. J. Appl. Phys. 53 (2014) 056201.