Paper PS-TuA11
LER/LWR Improvements in Dual Frequency CCPs for Advanced Node Patterning

Tuesday, November 11, 2014, 5:40 pm, Room 308

One of the key parameters in semiconductor mass production control is Line Edge Roughness (LER) / Line width roughness (LWR) owing to its direct contribution to gate length variation, edge placement error, line resistance variation and others. Due to the resolution-line edge/width roughness-sensitivity (RLS) trade-off for photoresists (PR), photolithography has reached its limit to further improve PR LER/LWR for advanced technology nodes (1xnm and beyond). Thus post lithography roughness reduction treatments have become critical in meeting the ITRS targets for LER/LWR. Vacuum Ultra Violet (VUV) treatment has been showing promising results with photochemical modification based smoothening of PR surface using gases like Ar, H₂, HBr etc. which can produce VUV radiation. While several studies have been published over the past decade for improving PR LER/LWR using VUV, most do so by analyzing the results post-VUV-treatment at resist level (before etch transfer). To get good LER for final pattern, pattern transferring from PR is also critical.

CCP chambers, by design, have advantages to achieve good LER/LWR due to the relatively low plasma density and high deposition/etch radical ratio. CCPs with a wide gap are able to well decouple top and bottom RF powers so that we have either low plasma density with high ion energy incident onto the wafer surface or vice versa. In this presentation, post etch LER/LWR data will be discussed with various approaches, such as different treatment duration, different gas combination, ratio plus DC superposition, PR margin, and different plasma parameter settings etc. We will demonstrate that in-order to meet the ITRS targets for LER/LWR for 1x nm and beyond requires co-optimization of the resist roughness with resist profile; thickness; and the subsequent pattern transfer process onto underlying stack.