|AVS 55th International Symposium & Exhibition|
|Plasma Science and Technology||Tuesday Sessions|
|Session:||Plasma Science Poster Session|
|Presenter:||J. Shoeb, Iowa State University|
|Authors:||J. Shoeb, Iowa State University
M.J. Kushner, Iowa State University
|Correspondent:||Click to Email|
To minimize leakage currents resulting from the thinning of the insulator of the gate-stack of field effect transistors, high-k metal oxides, and HfO2 in particular, are being implemented as a replacement for SiO2. To speed the rate of processing, it is desirable to etch the gate stack (e.g., metal gate, anti-reflection layers, dielectric) in a single process while having selectivity to the underlying Si. Plasma etching using Ar/BCl3/Cl2 mixtures have been shown to effectively etch HfO2 while having a good selectivity with respect to Si. In this talk, we discuss results from integrated reactor and feature scale modeling of gate stack etching in chlorine plasmas. The stack consists of an erodible photoresist mask, metal gate and HfO2 with underlying Si (and possibly anti-reflection layers). Reactant fluxes were obtained from reactor scale modeling of inductively and capacitively coupled plasma tools using the Hybrid Plasma Equipment Model. Surface reaction mechanisms were developed using its Surface Kinetics Module. The mechanisms were implemented in the Monte Carlo Feature Profile Model with which etch profiles are predicted. We found that BClx species produced by electron impact in the plasma react with HfO2 which, under ion impact, form volatile etch products such as BxOCly and HfClx. Selectivity to Si is achieved by boron creating Si-B bonding as a precursor to the deposition of BClx polymer, which slows the etch rate relative to HfO2. The low ion energies required to achieve this selectivity then challenge one to obtain highly anisotropic profiles in the metal gate portion of the stack. Validation was performed with data from the literature. Results will be discussed from parametric studies of process variables (e.g., gas mixture, power, bias) on etch rate and profile.
*Work supported by the Semiconductor Research Corp.