AVS 55th International Symposium & Exhibition
    Plasma Science and Technology Monday Sessions
       Session PS-MoA

Paper PS-MoA10
Predictive Etch Profile under Competition Among Deposition, Etching, and Charging on Dielectrics in a Low Temperature Plasma

Monday, October 20, 2008, 5:00 pm, Room 304

Session: Invited Highlights on Plasma-Surface Interactions - Honoring the Distinguished Career of Herbert H. Sawin
Presenter: T. Makabe, Keio University, Japan
Correspondent: Click to Email

A dielectric surface exposed to plasma irradiation keeps competitive, physical and chemical processes among etching, deposition, and charging on the local pattern.1 Top down plasma nano-etching is a technology assisted by a directional and energetic positive ion onto a surface saturated by adsorbed chemical molecules. The ion flux to the wafer has a magnitude of 1015cm-2s-1. It means that the ion incident on the surface transfers the kinetic energy to the lattice with a relaxation time shorter than the surface collision interval. We have no way to protect the surface from the charging damage, particularly on the dielectric, in a periodically steady state radio frequency (rf) plasma, which always forms the positive ion sheath in front of the biased wafer to be etched. We have demonstrated a technique to inject negative charges having a relatively high energy in a synchronized mode between an rf plasma source with on/off period and a LF bias pulse in order to develop a charging free plasma etching. It is realized by an artificial formation of a double layer close to the wafer.2,3 The synchronized pulsed operation will enable us to develop a charging free plasma etching. The time constant of local charging, caused by the great difference in the velocity distribution between ions and electrons incident on a topographical surface, is approximately two orders of magnitude shorter than the time for the effective monolayer etching in SiO2. This difference enables us to estimate the etching profile by the two-step evaluation, i.e., surface charging followed by etching. Even in a controlled wafer exposed to a plasma etching, the surface is the competitive processes between etching and deposition, where two-layer model will be efficient in order to predict the feature profile evolution by using Level set method3. Predictive images are shown and discussed for the feature profile evolution of dielectric.

1 T. Makabe and Z. Petrovic, “Plasma Electronics: Applications in Microelectronic Device Fabrication”, Taylor & Francis (2006).
2 T. Ohmori, T. Goto, T. Kitajima, and T. Makabe, Appl. Phys. Lett. 83, 4637-9 (2003); T. Ohmori and T. Makabe, Appl. Surf. Sci. 254, 3696-3709 (2008).
3 T. Shimada, T. Yagisawa, and T. Makabe, Japan J. Appl. Phys. 45, L132-4 (2006); Ibid. 45, 8876-82 (2006); T. Makabe, T. Shimada, and T. Yagisawa, Comp. Phys. Commun. 177, 64-7 (2007).