AVS 54th International Symposium
    Plasma Science and Technology Wednesday Sessions
       Session PS1-WeA

Paper PS1-WeA5
Impact of Cu Contamination on Chamber Walls on Via-Hole CD Shift in Cu Dual Damascene Etching

Wednesday, October 17, 2007, 3:00 pm, Room 606

Session: Plasma-Wall Interactions
Presenter: H. Hayashi, Toshiba Corporation, Japan
Authors: H. Hayashi, Toshiba Corporation, Japan
K. Sato, Toshiba Corporation, Japan
K. Yamamoto, Toshiba Corporation, Japan
T. Kaminatsui, Toshiba Corporation, Japan
A. Kojima, Toshiba Corporation, Japan
I. Sakai, Toshiba Corporation, Japan
M. Hasegawa, Toshiba Corporation, Japan
T. Ohiwa, Toshiba Corporation, Japan
Correspondent: Click to Email

With shrinkage of ULSI design rule, Cu wiring and low-k materials such as SiOC and poly arylene ether film (PAE) have been introduced to reduce RC delay in the metal interconnects. Furthermore, wafer-to-wafer repeatability of etching processes becomes a major concern. Therefore, controlling the chamber wall condition has been widely studied. In the SiOC etching process, fluorocarbon based plasma is used, which forms fluorocarbon film on the chamber walls. Typically, chamber cleaning is performed using oxygen based plasma, which removes the fluorocarbon film. Cu, which is sputtered from the Cu wiring exposed to the plasma during etching, deposits on the chamber walls and possibly remains, even after chamber cleaning. In this report, the influence of this Cu contamination on etch performance is studied. The stacked films of the PAE/SiOC hybrid dual damascene (DD) structure1 for 45nm- node logic device were sequentially etched in the same chamber (all-in-one process). Wafers with Cu surface which becomes exposed during DD etching were etched, and it was found that the via-hole critical dimension (CD) of the second wafer of a lot decreased by 20 nm compared to the first wafer. However, SiO2 and resist etch rates did not show any significant change. Then, plasma analyses using optical emission spectrometry with a high resolution of 0.1 nm were carried out to investigate the cause of the via-hole CD shift. It was found that the Cu emission intensity in the plasma of the second wafer was higher compared with the first wafer. This Cu emission intensity increase originated from the Cu deposited on the chamber walls during etching of the first wafer. Then, a wafer was etched after a chamber cleaning process to remove Cu was carried out, and it was found that the via-hole CD was the same as the first wafer. The Cu emission intensity became equivalent to that of the first wafer, also. The Cu emission intensity had a correlation with via-hole CD shift. Thus, Cu optical emission is sensitive to Cu contamination on the chamber walls, and the monitoring of Cu emission is an effective method of controlling the via-hole CD shift.

1 A. Kajita et. al., Proc. of IITC (2003) p.9.