Paper PS1+NS-WeM11
High Aspect Ratio Deep Trench Chamber and Process Development for Silicon Etch in DRAM Applications below 50 nm

Wednesday, October 17, 2007, 11:20 am, Room 606

For Qimonda´s DRAM Technology the deep trench etched into silicon is the base for the capacitor concept. The shrink of lateral dimensions at approximately constant capacity specifications leads to increased deep trench aspect ratio requirements. Therefore high selectivity to the etch mask and excellent uniformity is needed, especially for technologies below 50nm. In this paper we describe the development of advanced DT plasma etch chamber and process to fulfill these requirements. New process regimes, e.g., RF pulsing and high temperature showed promising results. Simulations were combined with in-situ plasma measurement techniques, e.g., QMS with ion energy analysis, high resolution OES, insitu IR absorption spectroscopy, and technological experiments, to characterize hardware features and process conditions. To achieve high Si etch rate and selectivity, plasma density and electron energy distribution in the plasma bulk, and ion energy distribution on the wafer surface can be optimized through multi frequency cathode excitation. The selectivity is further enhanced by using advanced hard mask materials and combining with RF pulsing. The optimization of the side wall passivation stoichiometry is a key for high aspect ratio silicon etch. In addition, the etch process chamber includes new features for process control, in-situ wafer surface temperature and trench depth measurement. The equipment and process development was accomplished through close cooperation between Qimonda and the tool supplier.