AVS 66th International Symposium & Exhibition
    Applied Surface Science Division Wednesday Sessions
       Session AS+CA+LS-WeA

Paper AS+CA+LS-WeA10
Low Temperature Scanning Tunneling Microscopy and Spectroscopy of Semiconductor Nanowire Device Surfaces

Wednesday, October 23, 2019, 5:20 pm, Room A211

Session: Operando Characterization Techniques for In situ Surface Analysis of Energy Devices
Presenter: Yen-Po Liu, Lund University, Sweden
Authors: Y-P. Liu, Lund University, Sweden
Y. Liu, Lund University, Sweden
S.F. Mousavi, Lund University, Sweden
L. Sodergren, Lund University, Sweden
F. Lindelöw, Lund University, Sweden
S. Lehmann, Lund University, Sweden
K.A. Dick Thelander, Lund University, Sweden
E. Lind, Lund University, Sweden
R. Timm, Lund University, Sweden
A. Mikkelsen, Lund University, Sweden
Correspondent: Click to Email

III-V semiconductor nanowires (NWs) show considerable promise as components in efficient and fast electronics as well as for quantum computing. In particular, the surfaces of the NWs play a significant role in their function due to the large surface to bulk ratio. Further, as the incorporation and activation of the nanowires in a device can affect their structure, it is relevant to study the surface structure and its influence on electronic properties in devices and during operation.

We use atomically resolved Scanning Tunneling Microscopy/Spectroscopy (STM/S) to study InAs and GaAs NWs in planar device configurations. [1-3] We use atomic hydrogen cleaning at 400°C to obtain well-defined surfaces that can be scanned with STM while the complete device is still fully functioning. [2] We study both NWs grown directly in a planar configuration as well as wires harvested from a growth substrate and placed on top of predefined metal contacts with ~100nm precision using a micro/nano probe. In our new <10K closed-cycle STM we can identify the individual device NWs simultaneously as we can apply voltages across the devices using four additional electrical contacts in the low temperature STM. We initially investigate NW device geometric structure and morphology with high precision. Then we continue to perform atomic resolution and low temperature STS mapping on top of the NWs surfaces to investigate electronic structure and potential quantum confinement effects as well as the influence of defects. These measurements can be performed while the device is actively operating by external biases applied and the I(V) characteristic across the NW is obtained. The STM tip can also act as a role as a local gate for Scanning Gate Microscopy (SGM) [4], which we can precisely locate on the operating single NWs device for SGM on the areas as STM is performed.

[1] Persson, O. et al., (2015). Nano Letters, 15(6), pp.3684-3691.

[2] Webb, J. et al., (2017). Scientific Reports 7, 12790

[3] Hjort, M. et al., (2015). ACS Nano, 8(12), pp.12346-12355

[4] Webb J.L. et al., (2014). Nano Research 7, 877