Paper NS-ThP4
a-Si:H Spacer Lithography Using Different Mandrels (Al, SiNx and Photoresist) and Etching Processes (RIE, ECR and ICP)
Thursday, October 25, 2018, 6:00 pm, Room Hall B
Semiconductors nanowires are essential for obtaining present and future electronic devices (transistors) and integrated circuits (microprocessors), which require technologies with dimensions smaller than 50 nm and 10 nm, respectively1,2. In this context, Spacer Lithography (SL) or Self- Aligned Double Patterning (SADP) methods for the definition of silicon nanowires (SiNWs), for sub-150 nm width dimensions, were developed. These methods are based on: i) hydrogenated amorphous silicon (a-Si:H) spacers (two thickness values of 60 nm and 150 nm) deposited by ECR-CVD (Electron Cyclotron Resonance (ECR) - Chemical Vapor Deposition (CVD)) at room temperature; ii) three different types of mandrels, aluminum – Al, deposited by sputtering;3 silicon nitride – SiNx , obtained by ECR-CVD; and photoresist, deposited by spinner; and iii) three different etching processes (RIE (Rective Ion Etching), ECR and ICP (Inductively Coupled Plasma). Scanning Electron Microscopy (SEM) and Atomic Force Microscopy (AFM) were used to obtain the SiNW widths and the shapes of tridimensional (3D) structures as shown a Figure 1. The Table 1 shows the results of the SiNW width values extracted from SEM images and confirmed by AFM analyses, in related to a-Si:H thickness (60 nm or 150 nm), mandrel materials (Al, SiNx or Photoresist) and etching processes (RIE, ECR or ICP). Furthermore, it is presented the comparison between the original a-Si:H thickness, after deposition and before etching process, and the SiNW width, after the etching, to detect if the lateral anisotropic etching of a-Si:H has occurred (or not), to obtain SiNW less wide than expected. From the results, it can be conclude that our method for the formation of semiconductors nanowires sub-150 nm wide is effective and feasible for 3D devices prototyping. Besides that, RIE and ECR processes present lateral etching, obtaining SiNWs with wide less that the a-Si:H spacer thickness.3 This result is interesting for the nanostructure formation without the traditional methods (e.g., EBL or 193i).2 It is important to notice that, the ICP process enable the SiNWs formation with width similar to the a-Si:H spacer, indicating that process is anisotropic.
1 Koike, K. et. al. Proc. SPIE 10586, Advances in Patterning Materials and Processes XXXV, 105861F (13 March 2018);
2 Bunday, B. et. al. Proc. SPIE 10585, Metrology, Inspection, and Process Control for Microlithography XXXII, 105850I (22 March 2018);
3 Rosa, A. M. et al. IEEE 30th Symposium on Microelectronics Technology and Devices (SBMicro) (2015).