Paper MN-ThP4
III-V_Si Wafer Bonding using Silicon Oxide Interlayer

Thursday, October 25, 2018, 6:00 pm, Room Hall B

In recently, the interests to integrate III–V based materials with Si can be divided into various application using the material advantages of combining III–V with Si. Therefore, Si wafer to III-V material wafer bonds were performed at low temperatures under 250 °C. The advantage of the low temperatures of these bonds was that wafers with common integrated circuit metals could withstand this temperature without degradation. Also, it is essential to study that low temperature bonding for heterogeneous wafers, because the higher temperature bonding may induce cracks, defects, bowing, and destruction by different thermal expansion coefficients of the heterogeneous wafers.

In this paper, we have investigated low-temperature direct bonding (<250°C) of SiO2 by the surface activation method in plasma. In the method, Oxyzen plasma treatment is used to make a clean surface which has strong bonding ability.The strength of Si oxide to Si oxide bonding prepared at room temperature by the method is equivalent to the bulk strength. Therefore, heating and pressure were applied to the wafers 20 minutes. Si oxide surfaces did not prove to bond spontaneously at room temperature and the bond-strength started to increase only after annealing at about 200°C.

A field emission scanning electron microscopy (FE-SEM) was used to determine the excellent bonding quality of the interface of wafer to wafer bonding. Silicon oxide surface roughness was examined using atomic force microscopy(AFM), respectively. After bonding, the bonded interfaces were evaluated using infrared transmission imaging.