AVS 65th International Symposium & Exhibition | |
Electronic Materials and Photonics Division | Monday Sessions |
Session EM+MP+PS-MoM |
Session: | IoT Session: CMOS, Beyond the Roadmap and Over the Cliff |
Presenter: | Mahmut Sami Kavrik, University of California at San Diego |
Authors: | M. Kavrik, University of California at San Diego V. Hou, TSMC, Taiwan, Republic of China E. Thomson, University of California at San Diego K. Tang, Stanford University Y. Taur, University of California at San Diego P.C. McIntyre, Stanford University A.C. Kummel, University of California at San Diego |
Correspondent: | Click to Email |
Silicon germanium (SiGe) with high-k dielectric is appealing for low power electronics due to high intrinsic carrier mobility of SiGe. However, the SiGe channel in CMOS transistors can be implemented commercially only if low defect SiGe/high-k interface can be fabricated. Studies have shown that electronic defects are mainly generated by interfacial germanium oxide (GeOx) which can be removed by selective oxygen gettering from GeOx or selectively forming interfacial silicon oxide (SiOx).
In this work, selective interface oxidation with ozone is studied. It is shown that ozone pulsing during the oxide ALD process can significantly lower the interface defect density (Dit) when the ozone is pulsed after deposition of at least a few monolayers of gate oxide. When ozone pulses are dispersed across the HfO2 during ALD growth, the electronic defect density is reduced more than 60% compared to control HfO2 samples. After careful optimization of ozone pulse and forming gas annealing, low interface defect density of Dit=5x1011 eV-1cm2 with 1.75uF/cm2 accumulation capacitance was demonstrated for the HfO2/Si0.7Ge0.3 interface. Gate oxide and the interface composition was investigated with STEM-EELS and Si riched composition was observed consistent with DFT models. Suppression of electronic defects at the HfO2- Si0.7Ge0.3(001) interface with SiOx selective interface oxidation using ozone was demonstrated.