Paper EM+AM+NS+PS-MoA6
Sub 0.3 micrometer Copper Patterns Etched with a Plasma-Based Process and Pattern Dependent Electromigration Failure Mechanism

Monday, October 22, 2018, 3:00 pm, Room 101A

Copper (Cu) is a popular interconnect material for high density ICs, large area TFT LCDs, and many advanced electronic and optical devices. Since Cu does not form volatile products under the conventional plasma etching condition, the only available method in preparing fine lines is the chemical mechanical polishing (CMP), i.e., the single or dual damascene, method. The author’s group has invented a new plasm-based Cu etching method that has a high rate at room temperature (1). This method has been successfully demonstrated in defining submicron lines for IC chips as well as being used in the large area TFT LCDs (2). However, this are few papers on defining the sub 0.5 micrometer Cu line using this new etch method. The lifetime of the plasma-etch Cu line on the flat and stepped surfaces has been studied with the electromigration method (3,4). However, the pattern size effect is rarely discussed.

In this talk, the author will discuss the process that can be used to prepare sub 0.3 micron dimension Cu patterns. The success of this process is due to the simultaneous Cu conversion reaction and sidewall passivation. In addition, the failure mechanism of the plasma-etched Cu line over a large range of line widths, i.e., from 1.5 to 30 micrometers, will be examined based on the electromigration test result. In summary, Cu lines prepared from the plasma-based process can be reliably applied in the many nano electronic and photonic products.

1. Y. Kuo and S. Lee, Jpn. J. Appl. Phys.39(3AB), L188-L190 (2000).

2. Y. Kuo, Proc. 16^th Intl. Workshop on Active-Matrix Flat Panel Displays and Devices, 211-214 (2009).

3. G. Liu and Y. Kuo, J. Electrochem. Soc., 156(6) H579-H584 (2009).

4. C.-C. Lin and Y. Kuo, J. Vac. Sci. Technol. B, 30(2), 021204-1 (2012).