AVS 65th International Symposium & Exhibition | |
Applied Surface Science Division | Monday Sessions |
Session AS-MoA |
Session: | Multitechnique Applications-When More techniques are Better than One |
Presenter: | Conor Thomas, IBM Systems Division |
Authors: | C.R. Thomas, IBM Systems Division B. Singh, IBM Systems Division R. Wang, IBM Systems Division |
Correspondent: | Click to Email |
Next generation computing systems are driving increasingly complex packaging architectures and interconnection techniques to meet higher performance and bandwidth requirements at smaller feature sizes. First-level packaging techniques that incorporate controlled collapse chip connections (C4) in flip-chip applications have become critical to enable near-future microelectronics packaging. Conventional C4 technology uses solder bumps for off-chip interconnections after back end of line wafer fabrication. Solder-based flip-chip technology is currently the industry standard with a proven track record of performance, reliability, and ease of manufacturing at low-cost. However, increasing I/O requirements are pushing the limits of interconnection pitch scalability below 50µm, resulting in a higher spatial density of solder bumps and reduction in solder volume per bump.
The surface cleanliness of fine-pitch solder bumps before chip attachment plays an important role in the solder wetting and reliability of the chip-package interconnect structure. In both flip-chip mass reflow and thermo-compression bonding techniques, the solder bump surfaces go through several assembly steps before chip join and are exposed to potential sources of contamination. Unfortunately, the solder bump surfaces are challenging to study by traditional surface characterization techniques like x-ray photoelectron spectroscopy, Auger electron spectroscopy, and secondary ion mass spectrometry due to the relatively small size of the bumps, the mixed conducting and insulating environments of the sample, and the high curvature of the bumps, respectively. These challenges have only been exacerbated by the decreasing size of the bumps.
Here we describe a new approach to characterize modern solder bumps using a time-of-flight secondary ion mass spectrometer (TOF-SIMS) with an atomic force microscope (AFM) integrated in the same vacuum chamber. We can correlate high spatial resolution TOF-SIMS images with AFM topography images to generate topography-corrected chemical images. With this method we can chemically and spatially characterize the contaminants on solder bump surfaces. This method will be compared with results from Auger electron spectroscopy, our standard method of characterizing solder bump surfaces. We will discuss the important considerations for TOF-SIMS imaging of these highly curved surfaces and approaches to correlate images taken by TOF-SIMS and AFM.