| AVS 63rd International Symposium & Exhibition | |
| Surface Science | Wednesday Sessions |
| Session SS+AS+EM-WeA |
| Session: | Semiconductor Surfaces and Interfaces |
| Presenter: | Steven Wolf, University of California at San Diego |
| Authors: | S. Wolf, University of California at San Diego M. Edmonds, University of California at San Diego T. Kent, University of California at San Diego K. Sardashti, University of California at San Diego M. Chang, Applied Materials J. Kachian, Applied Materials R. Droopad, Texas State University E. Chagarov, University of California at San Diego A.C. Kummel, University of California at San Diego |
| Correspondent: | Click to Email |
Compound semiconductors with high mobilities such as InGaAs and SiGe are being employed in metal oxide semiconductor field effect transistors (MOSFETs) to increase transistor performance. However, these surfaces contain dangling bonds that can affect the surface Fermi level; thus, depositing a control layer via ALD or self-limiting CVD on multiple materials and crystallographic faces is required . Silicon uniquely bonds strongly to all crystallographic faces of InGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge enabling transfer of substrate dangling bonds to silicon, which can then be passivated by atomic hydrogen. Subsequently, the surface may be functionalized with an oxidant such as HOOH in order to create a terminating Si-OH layer, or a nitriding agent such as N2H4 in order to create an Si-Nx diffusion barrier and surface protection layer. This study focuses on depositing saturated Si-Hx and Si-OH seed layers via a self-limiting CVD process on InGaAs(001)-(2x4), and depositing a Si-Nx seed layer on Si0.5Ge0.5(110) and Si0.7Ge0.3(001) via an ALD process. XPS in combination with STS/STM were employed to characterize the electrical and surface properties of these control layers on the various surfaces. A thin Si-Hx capping layer (2.5 monolayers) was deposited in a self-limiting CVD fashion on InGaAs(001)-(2x4) by exposing to Si2Cl6 at 350°C. This layer allows for multilayer silicon or Si-Ox growth by ALD through cyclically dosing Si2Cl6 with either atomic H or anhydrous HOOH. STM and STS measurements show the Si2Cl6 exposed InGaAs(001)-(2x4) surface is atomically locally ordered and has an unpinned surface Fermi level. Exposure to anhydrous HOOH at 350°C terminates the surface with Si-O bonds and does not lead to oxidation of substrate peaks. The HOOH treated surface then nucleates TMA at 250°C and ultimately further high-k gate oxide growth. MOSCAP device fabrication was performed on n-type InGaAs(001) substrates with and without a Si-Hx passivation control layer deposited by self-limiting CVD in order to determine the effects on Cmax, frequency dispersion, and midgap trap states. Deposition of a SiOxNy diffusion barrier and surface protection layer was achieved on the Si0.5Ge0.5(110) and Si0.7Ge0.3(001) surfaces via an ALD process at 275°C through cyclically dosing Si2Cl6 and anhydrous N2H4. MOSCAP device fabrication was performed on Si0.7Ge0.3(001) with and without a SiOxNy passivation control layer to compare device performance. Ultimately, the Si-Hx passivation layer gave less frequency dispersion at flat band and a lower Dit, and the SiOxNy passivation layer yielded lower gate leakage and Dit when compared to the respective wet clean only devices.