AVS 63rd International Symposium & Exhibition | |
Applied Surface Science | Thursday Sessions |
Session AS+SS-ThM |
Session: | Depth Profiling, Buried Interfaces, and 3D Analyses |
Presenter: | AjayKumar Kambham, GLOBALFOUNDRIES U.S. Inc. |
Authors: | A. Kambham, GLOBALFOUNDRIES U.S. Inc. D. Flatoff, GLOBALFOUNDRIES U.S. Inc. P.A.W. van der Heide, GLOBALFOUNDRIES U.S. Inc. |
Correspondent: | Click to Email |
One of the aims in CMOS device development is to reduce power consumption while increasing performance. Pivotal to this, is the critical need to engineer dopant profiles, and to define the formation of the appropriate junctions. Tied to this is the increased severity of short channel effects (SCEs) as dimensions are decreased, hence the reason to move to 3D structures in the form of FinFETs. One type of SCE that is known to cause performance degradation is Drain Induced Barrier Lowering (DIBL). To reduce DIBL, dopant junction profiles are made more abrupt. This can be done through the introduction of Sigma/cavity, fully depleted silicon-on-insulator (FDSOI) structures and the modulation of stress through optimal engineered epitaxial buffer layers. To assess the quality of interfaces in these different structures over nanometer scale regions requires the use of analysis techniques such as Atom Probe Tomography (APT) and Transmission Electron Microscopy (TEM). This presentation will discuss the ability of APT to extract the critical information of interest to device engineering.