| AVS 62nd International Symposium & Exhibition | |
| Plasma Science and Technology | Monday Sessions |
| Session PS-MoM |
| Session: | Advanced FEOL/Gate Etching |
| Presenter: | Yohei Ishii, Hitachi High Technologies America Inc. |
| Authors: | Y. Ishii, Hitachi High Technologies America Inc. K. Okuma, Hitachi High Technologies America Inc. N. Negishi, Hitachi High Technologies America Inc. J. Manos, Hitachi High Technologies America Inc. |
| Correspondent: | Click to Email |
To achieve improvements in semiconductor device performance, 3D transistors (FinFET) were introduced due to limitations in planar structures. Because of the complexity of the structure and high aspect ratio features, new challenges have appeared. Among many processes, spacer etch is one process that could have an impact on device performance. During spacer etch, there are several issues that arise such as SiN selectivity over Si and gate shoulder retention.
In this presentation, we will demonstrate a spacer etching process, using a novel gas, and utilizing a Hitachi microwave Electron Cyclotron Resonance (M-ECR) etcher. SiN selectivity over Si is improved compared to a conventional gas chemistry such as CH3F base process. In addition, while the spacer is etched, the gate shoulder has to be protected. Finally, we will also introduce an etching method that overcomes the trade-off relationship between gate shoulder retention and spacer etch.