Paper MC-TuM4
Atomic Scale Analysis by Atom Probe on 3D Semiconductor Structures

Tuesday, October 20, 2015, 9:00 am, Room 114

Device structures are rapidly scaling down to the nanometer regime with the ongoing development in semiconductor device technology. Along with this, it is ever critical need to engineer dopant profiles and to define the formation of junctions in Metal-oxide field effect transistors (MOSFETs). This is increasingly challenging considering the severity of short channel effects (SCEs). Indeed, one type of SCE in MOSFET devices known to cause performance degradation is Drain Induced Barrier Lowering (DIBL). To reduce DIBL, dopant junction profiles are made more abrupt. This can be done through the introduction of Sigma/cavity structures and the modulation of stress through optimal engineered epitaxial buffer layers. To assess the quality over nanometer scale regions requires the use of analysis techniques such as Atom Probe Tomography (APT) and Transmission Electron Microscopy (TEM). This presentation will discuss the role of APT and how elemental distributions vary depending on type of faces employed, i.e. Si (100) vs Si (111) along with the challenges involved in sample preparation.