AVS 61st International Symposium & Exhibition | |
Electronic Materials and Processing | Tuesday Sessions |
Session EM+2D-TuA |
Session: | High-k Dielectrics for Advance Semiconductor |
Presenter: | Paul Hurley, Tyndall National Institute, Ireland |
Authors: | P.K. Hurley, Tyndall National Institute, Ireland V. Djara, IBM Research - Zurich, Switzerland E. O'Connor, Tyndall National Institute, Ireland S. Monaghan, Tyndall National Institute, Ireland I.M. Povey, Tyndall National Institute, Ireland J. Lin, Tyndall National Institute, Ireland M.A. Negara, Stanford University B. Sheehan, Tyndall National Institute, Ireland K. Cherkaoui, Tyndall National Institute, Ireland |
Correspondent: | Click to Email |
As silicon devices reach the limit of dimensional scaling there is a growing interest in the use of high electron mobility channels, such as InxGa1-xAs, in conjunction high dielectric constant (high-k) gate oxides for n-channel Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) and tunnel FET (TFETs) based devices. The understanding and control of electrically active defect states at the high-k/InxGa1-xAs interface and of charges within the atomic layer deposited (ALD) high-k films will be essential for the successful implementation of high mobility channel materials. The objective of this presentation will be to provide an overview of the current understanding of the density and distribution of electrically active defects at the high-k/InGaAs interface both within the InGaAs energy gap and extending into the InGaAs conduction band. The presentation will focus on InGaAs with a 53% Indium concentration. The electrically active interface state density distribution is determined from fully fabricated InGaAs MOSFET structures based on the full gate capacitance in conjunction with the Maserjian Y-function and Poisson-Schrodinger simulations. Very significant progress has been made in recent years in the passivation and intrinsic elimination of high-k/In0.53Ga0.47As interface defects to the point where genuine surface inversion for n and p type InGaAs MOS structures can be achieved and this research will be reviewed. The characteristic signatures of capacitance and conductance for an InGaAs MOS structure in inversion will also be discussed.
Electrically active defects with energies aligned with the InGaAs conduction band are significant for surface inversion mode MOSFETs and can result in a partitioning of charge between free carriers and trapped charge for devices biased above the threshold voltage. The presence of such defect also complicates the extraction of free charge and carrier mobility from device analysis. In this presentation we will also review a new approach where the technique of inversion charge pumping (initially developed for silicon MOSFETs) is applied to InGaAs MOSFETs to determine the free carrier concentration. Results will also be presented which indicate that the duty cycle of the inversion charge pumping technique can be used to discriminate between fast interface states and traps within the oxide for InGaAs MOSFETs biased beyond the threshold voltage.