AVS 59th Annual International Symposium and Exhibition
    Electronic Materials and Processing Tuesday Sessions
       Session EM-TuA

Paper EM-TuA8
Developing Robust Ultra-Low-k Dielectric (κ≤2.55) Materials using Novel Characterization Techniques for the 20nm Node and Beyond

Tuesday, October 30, 2012, 4:20 pm, Room 009

Session: Materials and Processes for Advanced Interconnects
Presenter: Z. Sun, GLOBALFOUNDRIES
Authors: D.R. Kioussis, GLOBALFOUNDRIES
Z. Sun, GLOBALFOUNDRIES
Y. Lin, GLOBALFOUNDRIES
A. Madan, IBM Semiconductor R&D Ctr
N. Klymko, IBM Semiconductor R&D Ctr
C. Parks, IBM Semiconductor R&D Ctr
S. Molis, IBM Semiconductor R&D Ctr
E.T. Ryan, GLOBALFOUNDRIES
E. Huang, IBM T.J. Watson Res. Center
S.M. Gates, IBM T.J. Watson Res. Center
A. Grill, IBM T.J. Watson Res. Center
B. Kim, Samsung Electronics Co. Ltd., Korea
J.K. Kim, Samsung Electronics Co. Ltd., Korea
D. Restaino, IBM Semiconductor R&D Ctr
T.H. Lee, IBM Semiconductor R&D Ctr
S. Hosadurga, IBM Research Group
S.A. Cohen, IBM T.J. Watson Res. Center
K. Virwani, IBM Research - Almaden
Correspondent: Click to Email

As the semiconductor industry pushes feature miniaturization limits beyond the 20nm node, novel interline dielectric materials with low dielectric constants (k-value), so called ultra low-k (ULK) materials (k < 2.55), are targeted to prevent capacitive crosstalk, interline leakage and reduced power consumption of advanced integrated circuits (IC). These materials are commonly porous (>15%) and organic in nature, which necessarily incur compromises in either the thermal or mechanical integrity with respect to more traditional dense low-k and SiO2 dielectrics. Porous organosilicate glass ULK films with k-values 2.4 - 2.55 deposited by PECVD and cured via UV irradition were first put into production at the 45nm node to further minimize RC delay. These ULK materials incorporate a large number of methyl (Si-CH3) groups and pores into Si-O based network structures. The methyl groups disrupt the Si–O bond network, which tend to lower density and also lower polarizability making the film hydrophobic. Lower density, reduced polarizability, and greater hydrophobicity decrease the k-value. Introduction of porosity is used to further lower the k-value but other critical film properties, such as fracture toughness are affected. A viable ULK material must survive “damage” sustained from a series of processing steps that include dual-damascene (DD) litho, RIE, stripping and cleaning, CMP, and packaging. The reliability of devices containing these multi-layer DD stacks depends heavily on the chemical and mechanical stability of the dielectric, as this is the material and structural template in which the IC functionality is laid. Damage mechanisms occur when ULK is exposed to RF-plasma during etching or ashing. Subsequent moisture adsorption leads to the increase of effective k-value degrading performance. The integration challenges of ULK are significant, such as plasma damage, chip packaging, and ILD/metal barrier compatibility issues. Substantial optimization of the ULK properties via quick turn methods is crucial for successful integration in advanced 20 nm generations. This study will discuss optimization of the material properties of single or dual precursor based ULK films through the use of different process chemistry and tuning of material deposition and UV curing parameters to meet the integration and packaging requirements. Quick turn characterization techniques were used to determine critical film properties. Correlation between film properties to the degree of plasma damage and mechanical integrity of ULK will be shown. We will show that careful modification of the ULK properties to minimize damage resulted in the successful integration at the 20nm node.