| AVS 56th International Symposium & Exhibition | |
| Plasma Science and Technology | Monday Sessions |
| Session PS1-MoM |
| Session: | Advanced Interconnect Etch |
| Presenter: | Q. Zhou, Applied Materials, Inc. |
| Authors: | Q. Zhou, Applied Materials, Inc. R. Patz, Applied Materials, Inc. A. Darlak, Applied Materials, Inc. J. Pender, Applied Materials, Inc. M. Armacost, Applied Materials, Inc. C. Labelle, GLOBALFOUNDRIES D. Horak, IBM Research |
| Correspondent: | Click to Email |
The development of 32nm technology processes highlighted many issues associated with Ultra Low-K (ULK) material. The softness and porosity of ULK caused many challenges, such as etch front roughness and strip damage, requiring modifications to the etch chemistry, pressure regime and plasma density. This learning has been applied to the 22nm node but new issues have developed. As we go to sub-100nm pitch features, there appears to be a critical dimension where the microloading increases dramatically. Traditional methods of correcting this response, such as pressure, bias power and degree of polymerization modifications, are not as effective for these small feature sizes. Adding to the difficulty of solving this issue is the restriction put on the available process regime by other ULK concerns, e.g. etch front roughness, faceting, film damage, etc.. Microloading trends, and strategies for improving it, have been identified and will be presented. A second issue encountered at sub-100nm pitch involves multi-layer photoresist patterning. As feature size shrinks the aspect ratio of the masking material increases. If the aspect ratio is high enough, and the process conditions are not managed correctly, pattern flop-over has been observed. Proper management of the etch steps can help mitigate flop-over, but there is a limited process window. Some of the issues surrounding this phenomenon will be discussed.
This work was performed by the Research Alliance Teams at various IBM Research and Development Facilities.