AVS 53rd International Symposium
    MEMS and NEMS Tuesday Sessions
       Session MN-TuP

Paper MN-TuP5
Bulk Micromachining of High Index Silicon Wafers and Possible Applications in Diffractive Elements

Tuesday, November 14, 2006, 6:00 pm, Room 3rd Floor Lobby

Session: Aspects of MEMS and NEMS Poster Session
Presenter: W. Calleja-Arriaga, INAOE, Mexico
Authors: W. Calleja-Arriaga, INAOE, Mexico
F.J. De la Hidalga-Wade, INAOE, Mexico
C. Reyes-Betanzo, INAOE, Mexico
A. Torres-Jacome, INAOE, Mexico
C. Zuñiga-Islas, INAOE, Mexico
M. Linares-Aranda, INAOE, Mexico
P. Rosales-Quintero, INAOE, Mexico
Correspondent: Click to Email
In this project we are evaluating new approaches to develop micromirror arrays and diffractive elements which have been fabricated using squared structures on (0 0 1) silicon wafers. In this project, n-type, 2-5 ohm-cm, two inch, 300 μm-thick, high index (1 1 4) and ( 5 5 12) silicon wafers were used, which were produced from [1 1 2] ingots. Most micromachined structures compatible in Microsystems are fabricated on (0 0 1) silicon wafers, rarely using (0 1 1) wafers and of course more rarely using high index wafers. Several sophisticated microstructures maybe fulfilled by using substrates with different crystallographic orientations. Our etching mask was designed including several polygon-like structures to analyze the resulting morphology and crystallographic planes developed during a long-time etching. One of them, an array of 10 squared structures is arranged as follows: the first square is aligned parallel/perpendicular to the (0 1 1) main flat and then the next squares were slanted ranging from 5@degree@ till 45@degree@ in 5@degree@ steps. We have developed our experimental work using different KOH-H2O dilution at 40 @degree@C. All the experimental procedure was developed at the same time on (0 0 1) and (0 1 1) silicon wafers, which were used as control samples. Our etching mask containing several polygon-like structures was transferred parallel to the main (0 1 1) flat of the low and high index wafers. We are reporting the etching of concave squared structures, watching the roughness evolution of the walls and bottom surfaces, with the main purpose of developing microstructures for integrated optics applications. At this stage we have facing some problems to develop micromirrors because the bottom surfaces developed on both high index wafers show some roughness. On the other hand we have observed a very interesting structure whose very smooth walls could be used to develop a very simple fabrication procedure of blazed diffraction gratings for infrared applications.