AVS 53rd International Symposium
    Electronic Materials and Processing Thursday Sessions
       Session EM-ThP

Paper EM-ThP52
Thickness Dependence of High Capacitance-Gate Dielectric Layer on Electrical, Structural Characteristics and OTFT Device Performance

Thursday, November 16, 2006, 5:30 pm, Room 3rd Floor Lobby

Session: Electronic Materials and Processing Poster Session
Presenter: C.S. Kim, Yonsei University, South Korea
Authors: C.S. Kim, Yonsei University, South Korea
H.K. Baik, Yonsei University, South Korea
Correspondent: Click to Email
In this study, pentacene TFTs operating at low voltage (-2V) were successfully fabricated using the CeO2-SiO2 dielectric layer with optimum thickness. The field effect mobility and on/off current ratio, at operating voltage of -2V, were 0.97cm2/Vs and 10^4, respectively. Threshold voltage and subthreshold slope were -0.4V and 0.58V/dec, respectively. We have also shown the correlation of surface morphology and leakage current density. In the thick films, the leakage current is not bulk limited but rather it depends on the surface roughness, which increases with film thickness. The realization of low voltage and low leakage devices make the OTFTs excellent candidates for future flexible display and electronics applications.