AVS 53rd International Symposium
    Electronic Materials and Processing Thursday Sessions
       Session EM-ThP

Paper EM-ThP42
A Study of High-k Removal by Plasma Etching and its Effect on Gate Dielectric Characterization

Thursday, November 16, 2006, 5:30 pm, Room 3rd Floor Lobby

Session: Electronic Materials and Processing Poster Session
Presenter: B.S. Ju, SEMATECH
Authors: B.S. Ju, SEMATECH
S.C. Song, SEMATECH
J. Barnett, SEMATECH
B.H. Lee, IBM
Correspondent: Click to Email
A process to remove high-k gate dielectric films (HfO@sub 2@ and Hf silicate) from the source and drain (S/D) areas after gate electrode etching was investigated to improve the performance and increase the packing density of CMOS transistors. A vertical gate stack profile can be achieved by replacing the conventional method to remove high-k dielectric films that combined physical bombardment and wet etching. This method has been effective to remove crystallized high-k film, but causes notching in Hf silicate or footing in HfO@sub 2@. We propose a new advanced high-k dry etch process using high temperature (250°C) and high density chlorine plasmas (BCl@sub 3@/Cl@sub 2@). The plasma etch process was optimized to enhance etch selectivity to Si, thus enabling the complete removal of high-k films without any substrate recess in the S/D active regions. Optical emission spectroscopy was used to identify the plasma etching by-products, which were mainly chlorinated hafnium, during plasma etching. After plasma etching, no remaining high-k film on the S/D area was detected with Auger electron spectroscopy (AES) measurement and no residual high-k films or structural weaknesses were found with high-resolution transmission electron microscopy (HRTEM). The new process to remove high-k on a CMOSFET device was electrically compared with the conventional wet chemical removal process. A significant amount of plasma damage on high-k films at the gate edge was found to be induced during dry etching, which generated leakage sources in the gate for both HfO@sub 2@ and Hf silicate devices. In situ surface oxidation after plasma removal of the high-k films cured the damage, which dramatically improved leakage current and simultaneously reduced off current, particularly in the short channel, for both PMOS and NMOS devices.