AVS 52nd International Symposium
    Nanometer-Scale Science and Technology Tuesday Sessions
       Session NS-TuP

Paper NS-TuP6
Formation of Nanometer-scale Structures Based on a Plasma Ashing and Lift-off Technique

Tuesday, November 1, 2005, 4:00 pm, Room Exhibit Hall C&D

Session: Nanometer Scale Science and Technology Poster Session
Presenter: G.-S. Kim, Sungkyunkwan University, Korea
Authors: G.-S. Kim, Sungkyunkwan University, Korea
Y.-H. Roh, Sungkyunkwan University, Korea
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Realization of nano- and/or bio-electronic devices requires the formation of nanometer-scale structures. Recently the fabrications of structures with a nano gap dimension have been demonstrated by using advanced techniques such as electron-beam lithography, focused ion beam lithography, or advanced optical lithography. However, these techniques are very slow, and moreover require a high production cost. Recently, our group proposed the new technique to overcome a resolution limit of an optical lithography for forming nanometer-scale structures. The technique utilizes a well known and a well established processing technique known as a photoresist (PR) ashing. In this technique, the minimum linewidth can be formed by ashing the PR pattern defined by the conventional optical lithography. In this work, we further developed this technique to form the various shapes of nanometer-scale structures including the line-and-space pattern and nanometer-scale holes. In this particular case, we used a negative PR (PMER) instead of a conventionally used positive PR since the final patterns of PMER after treating the ashing process result in the high aspect ratio, reversal echelon formation and excellent property for fine pattering in general. In turn, the lift-off step that is required to form the highly aligned nanometer-scale structures can be easily followed. Based on the current investigation, we found that various types of nanometer-scale structures can be easily formed using semiconductor, metal and insulator materials. These results may open the possibilities to fabricate the unique tools for the vertical-type field effect transistors and highly aligned emitters.