AVS 52nd International Symposium
    MEMS and NEMS Tuesday Sessions
       Session MN-TuM

Paper MN-TuM11
Aspect Ratio Dependent Etching Lag Reduction in Deep Silicon Etch Processes

Tuesday, November 1, 2005, 11:40 am, Room 207

Session: Micro and Nano Fabrication Techniques for MEMS & NEMS
Presenter: S.L. Lai, Unaxis USA, Inc.
Authors: S.L. Lai, Unaxis USA, Inc.
D. Johnson, Unaxis USA, Inc.
R.J. Westerman, Unaxis USA, Inc.
Correspondent: Click to Email
MEMS device fabrications often involve 3-D structures with high aspect ratios. Moreover, MEMS designs require structures with different dimensions and ARs to co-exist on a single microchip. There is a well-documented aspect ratio dependent etching (ARDE) effect in deep silicon etching (DSE) processes. The ARDE effect can be manifested in two ways: firstly, the etch rate decreases as the aspect ratio increases for a specific feature; secondly, for features with different dimensions etched simultaneously, bigger features are etched at faster rates. For example, when a 2.5 µm-wide trench is etched simultaneously with a 100 µm-wide trench in a conventional DSE process, the resultant trench depth of the latter can be more than double that of the 2.5 µm-wide trench. Indeed, the ARDE effect causes many undesired complications to MEMS device fabrication. One of the approaches to cope with ARDE is to employ etch stop layers, such as oxide, to compensate the lag. However, disadvantages, such as notching at the silicon/oxide interface, emerges sometimes when an etch stop layer is used. At Unaxis, we have developed a proprietary technique to eliminate the ARDE effect encountered in DSE processes. Our novel technique is based on a new physical model for ARDE lag reduction. This paper presents the theoretical model and the experimental results on ARDE reduction. With controls over the passivation and etch steps employed in a TDM etch process, we have demonstrated that normal ARDE can be changed to inverse ARDE, while maintaining good etch profile in all features. DSE processes can be optimized such that ARDE is completely eliminated. In the experiments, the ARDE lag was reduced to below 3% for trenches with widths ranging from 2.5 to 100 µm; for trenches with widths ranging from 4 to 30 µm, the ARDE lag was below 2%. Such results were achieved at etch rate exceeding 2 µm/min.