AVS 52nd International Symposium
    Electronic Materials and Processing Tuesday Sessions
       Session EM-TuP

Paper EM-TuP32
Electromigration Performance by Via Structure in Cu Dual-damascene Process

Tuesday, November 1, 2005, 4:00 pm, Room Exhibit Hall C&D

Session: Electronic Materials and Processing Poster Session
Presenter: H.-K. Lee, Chung-Ang Univ., Korea
Authors: H.-K. Lee, Chung-Ang Univ., Korea
M.-H. Choi, Chung-Ang Univ., Korea
N.-H. Kim, Chosun Univ., Korea
S.-Y. Kim, DongbuAnam Semiconductor Inc.
E.-G. Chang, Chung-Ang Univ., Korea
Correspondent: Click to Email
In order to improve the interconnect performance, Cu has been used as the interconnect material instead of Al. One of the advantages of using Cu instead of Al interconnects for ULSI circuits is high electromigration (EM) and low resistance and it is based alloys to copper interconnect leads to new via structure fabricated by dual-damascene process. Improved EM characteristic leads to not only high reliability but also high speed of ULSI. The effects of a Ta/TaN Cu diffusion barrier existence on the EM reliability and EM performance of Cu dual-damascene interconnects were investigated. In this study, EM experiments are performed on interconnect structures of via bottom in Cu dual-damascene interconnection system. In result of EM test by interconnect structure, a high EM performance for copper dual-damascene structures was observed with the conventional interconnect structure to remain Ta/TaN barrier layer at via bottom. The failure analysis of the EM investigated with the focused ion beam (FIB), scanning electron microscope (SEM), and transmission electron microscope (TEM) equipments. Failures in direct contact via (DCV) structure by using bottomless process were formed at copper lines. However the EM failures were found at the top of via through the Cu-SiN interface. DCV structure of via EM had lower activation energy than conventional interconnect structure. Via resistance was decreased DCV structure by using bottomless process. The existence of barrier layer at via bottom has the relation with the difference of EM failure mode. From the different via failure modes, it can be concluded that the barrier layer at via bottom was enhanced the back stress in conventional structure due to the blocking of Cu flow. Acknowledgement : This work was supported by grant No. R01-2002-000-00375-0 from the Basic Research Program of the Korea Science & Engineering Foundation.