AVS 52nd International Symposium
    Electronic Materials and Processing Monday Sessions
       Session EM-MoM

Paper EM-MoM4
Suppression of Fixed Charge at Internal Interfaces between SiO@sub 2@ and Dual-Layer High-k Gate Dielectrics: HfO@sub 2@-Al@sub 2@O@sub 3@

Monday, October 31, 2005, 9:20 am, Room 309

Session: Electronic Properties of High-k Dielectrics and their Interfaces
Presenter: C.L. Hinkle, North Carolina State University
Authors: C.L. Hinkle, North Carolina State University
G. Lucovsky, North Carolina State University
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A reduction in interfacial fixed charge between SiO@sub 2@ and high-k dielectrics has been studied using a dual layer high-k stack to match intrinsic bonding properties at interfaces. Previous studies of Al@sub 2@O@sub 3@ on SiO@sub 2@ have shown a large amount of fixed charge at the interface, effectively eliminating Al@sub 2@O@sub 3@ from the discussion of alternative gate dielectrics. However, a self-organization occurs for Zr and Hf oxides and silicates after anneal that leaves low interfacial charge at the interface of those materials and an SiO@sub 2@ buffer layer. The density of interfacial defects has been shown to scale with the step in bonds per atom at the interface, D@sub int@ @alpha@ [N@sub av@(A) - N@sub av@(B)]@super 2@. Using this scaling as a guide, internal interfaces can be engineered from materials that match the average bonds per atom on both sides of the interface thereby reducing the number of defects and suppressing the fixed charge. A gate stack using SiO@sub 2@-HfO@sub 2@-Al@sub 2@O@sub 3@ has been produced using these techniques. The SiO@sub 2@-HfO@sub 2@ interface becomes self-organized and relatively defect low after anneal at 800°C whereas the HfO@sub 2@-Al@sub 2@O@sub 3@ interface has a matchup of N@sub av@ intrinsically. Electrical characterization of the gate stacks was done using C-V measurements to analyze the flatband voltage shift in these materials. The flatband voltage for the SiO@sub 2@-HfO@sub 2@-Al@sub 2@O@sub 3@ stack is effectively the same as a film of SiO@sub 2@ showing the reduction in fixed charge expected from the theory mentioned above. Different thicknesses of each layer have been studied as well as frequency dependent C-V to determine trapping at the internal interfaces. Using this proposed method extends the range of usable high-k materials.