AVS 51st International Symposium
    Electronic Materials and Processing Tuesday Sessions
       Session EM-TuM

Invited Paper EM-TuM7
CMOS Metal Gate Implementation

Tuesday, November 16, 2004, 10:20 am, Room 304B

Session: Contacts and Metallization
Presenter: C. Cabral, Jr., IBM T.J. Watson Research Center
Authors: C. Cabral, Jr., IBM T.J. Watson Research Center
V. Narayanan, IBM T.J. Watson Research Center
J. Kedzierski, IBM T.J. Watson Research Center
M. Copel, IBM T.J. Watson Research Center
C. Lavoie, IBM T.J. Watson Research Center
J.L. Jordan-Sweet, IBM T.J. Watson Research Center
E.P. Gusev, IBM T.J. Watson Research Center
J.M.E. Harper, University of New Hampshire
Correspondent: Click to Email
As scaling of CMOS transistors continues, for improved performance and manufacturing density, the leakage current through the thinner oxynitride dielectrics is becoming prohibitively large. Replacing the polycrystalline silicon in the gate with a metal is an approach, which leads to a decrease in the electrical thickness of the gate without having to decrease the physical dielectric thickness. The elimination of the poly-Si depletion region thus improves performance without substantially degrading leakage current. There are several integration schemes for implementing metal gates. There is a conventional approach for which the metal-dielectric combination must withstand high temperature dopant activation anneals, a gate last approach which limits the temperature to that used for the interconnect levels and a process by which the poly-Si of the gate is consumed in a reaction to form a metal silicide. Replacing the poly-Si in the gate typically requires a dual metal approach; a metal with a pFET workfunction and a second with an nFET workfunction. In this work a variety of metallic materials with workfunctions spanning the Si bandgap are characterized to determine the most appropriate integration approach for each based on the thermal stability of the metal-dielectric. In situ x-ray diffraction, optical scattering and resistance analysis, conducted at the Brookhaven National Laboratory, were used to determine when a metal-dielectric combination undergoes thermal degradation during annealing. It was found that some materials undergo reactions with the dielectric, others were unstable due to agglomeration, several binary compounds undergo dissociation and materials such as W, Re, Rh, Ir, TaN and TaSiN are very stable. The fully silicided metal gate integration approach will also be discussed. It will be demonstrated that the workfunction for NiSi can be modulated by the addition of implanted species into the poly-Si gate before silicide formation or by alloying the Ni.