AVS 51st International Symposium
    Materials Solutions for Cooling Technology Topical Conference Monday Sessions
       Session CT-MoA

Invited Paper CT-MoA5
Overview of the Heat Removal by Thermo Integrated Circuits (HERETIC) Program at the Defense Advanced Research Projects Agency (DARPA)

Monday, November 15, 2004, 3:20 pm, Room 303B

Session: Material Solutions for Chip Cooling
Presenter: D.J. Radack, Defense Advanced Research Projects Agency (DARPA)
Correspondent: Click to Email

The objective of the HERETIC program is to develop solid-state and fluidic heat removal devices that are integrable with dense, high-performance electronics and photonics. These devices are envisioned to short-circuit the thermal resistance between heat sources and thermal sinks; they should also lead to a reduction in overall system volume and weight. It is expected that devices will be designed for high efficiency operation (in terms of work done to remove a unit of heat from a hot junction). Traditional thermal management in many electronic and optoelectronic systems is generally relegated to the end of the process sequence in the packaging of the systems. For non-critical applications, where the systems are used in relatively benign environments, this approach is cost-effective and has worked well. This ad hoc method of thermal management is inadequate and the need for new or novel approaches becomes clear for certain situations. These situations may be: where the system package must be small and compact; where the density of high-performance, high-power chips on a board is high; or where the environment is thermally harsh. In conventional thermal management, heat removal or cooling is typically addressed hierarchically. The first level of the hierarchy is at the system level, the second is at the board level, and the third is at the chip-package level. As a common example, consider the following case: at the system (box) level, global air circulation may be effected by a fan that blows over boards that comprise the system; at the board level, the chips may be mounted on a board that allows the circulation of a coolant through it; and, at the chip-package level, the package (containing a telecommunications laser chip or a special processor chip, for example) could be cooled directly by a thermoelectric cooler. The focus of this program is at chip and board levels.