AVS 51st International Symposium
    Applied Surface Science Thursday Sessions
       Session AS-ThM

Paper AS-ThM4
Engineering the Properties of Hf-based Gate Dielectrics: Role of Initial Surface Preparation and Post Deposition Annealing

Thursday, November 18, 2004, 9:20 am, Room 210A

Session: High-k Dielectrics
Presenter: Y.-S. Lin, University of California, Los Angeles
Authors: R. Puthenkovilakam, University of California, Los Angeles
Y.-S. Lin, University of California, Los Angeles
J.P. Chang, University of California, Los Angeles
Correspondent: Click to Email

Alternative gate dielectrics such as HfO@sub 2@ or HfO@sub x@N@sub y@ are required in the future generations of MOSFET devices to enable their rapid down-scaling. However, the material and electrical properties of these materials are not fully understood or optimized. In this work, we investigate the material and electrical properties of ultra thin HfO@sub 2@ and HfO@sub x@N@sub y@ films on Si, deposited by an atomic layer controlled deposition process involving alternate pulses of Hf-t-butoxide precursor and oxygen (or NH@sub 3@). Post deposition annealing was performed in-situ in O@sub 2@, N@sub 2@, N@sub 2@O, NH@sub 3@ and ex-situ in H@sub 2@/D@sub 2@. X-ray photoelectron spectroscopy (XPS) measurements indicated the formation of interfacial layer and its structural changes upon post-deposition will be addressed. Extended x-ray absorption fine structure (EXAFS) measurements indicated that the short-range order in the as-deposited HfO@sub 2@ films resembled to that of the monoclinic phase HfO@sub 2@ and showed signs of crystallization upon annealing, while N incorporation seems to change the short-range order in the films and increase the crystallization temperature. Capacitance-voltage (C-V) measurements were performed on MOS devices to extract the dielectric constants (k), flat band voltage shifts, and interface state density. The as-deposited samples yielded k-values from 15-23 and their leakage currents were significantly less than that of SiO@sub 2@ films at the same equivalent oxide thickness (EOT). Temperature dependent current-voltage (I-V) measurements were performed to elucidate the conduction mechanisms in these ultra thin films. Substrate injection resulted in Schottky-like current transport while the gate injection showed a tunneling mechanism. The effect post-deposition annealing on the electrical performance will also be addressed in this talk in detail.