AVS 50th International Symposium
    Processing at the Nanoscale Tuesday Sessions
       Session NS+MI-TuA

Paper NS+MI-TuA7
Fabrication and Electrical Characterization of 2D Dopant Nanostructures in Si

Tuesday, November 4, 2003, 4:00 pm, Room 308

Session: Nanoscale Patterning and Lithography
Presenter: J.S. Kline, University of Illinois at Urbana-Champaign
Authors: J.S. Kline, University of Illinois at Urbana-Champaign
J.C. Kim, University of Illinois at Urbana-Champaign
S.J. Robinson, University of Illinois at Urbana-Champaign
K.-F. Chen, University of Illinois at Urbana-Champaign
R. Chan, University of Illinois at Urbana-Champaign
M. Feng, University of Illinois at Urbana-Champaign
J.R. Tucker, University of Illinois at Urbana-Champaign
J.-Y. Ji, Utah State University
T.-C. Shen, Utah State University
C. Yang, University of Utah
R.-R. Du, University of Utah
Correspondent: Click to Email
Lithography and contact with external leads are the two major challenges in nanoscale electronic device fabrication. We attempt to address both of these issues by using an integrated approach. STM lithography on H-terminated Si surfaces routinely achieves 1nm resolution. P donors can be selectively deposited onto the H-desorption area by dosing phosphine gas onto the STM patterned device template. Subsequent Si low-temperature deposition and annealing allows epitaxial overgrowth and the dopant atoms are completely activated. The sheet resistance of the P-delta layer is in the range of 1-4k@Omega@/square and can be controlled by phosphine surface coverage. External contacts to the device are fabricated by As ion implantation. We present a method whereby differences in surface features and tunneling spectroscopy between the contact and device region allow the registration of the STM. Low temperature electrical measurements of nanowires and other more complex structures are currently in progress and will also be reported. This work is supported by NSF, ARO, and DARPA.