Metal silicides have played an indispensable role during the remarkable developments of microelectronics since PtSi was first used to improve the rectifying characteristics of diodes in early 1960's. Along with several other technological innovations, the implementation of the self-aligned silicide (SALICIDE) technology has paved the way for rapid and successful miniaturization of device dimensions for metal-oxide-semiconductor field-effect transistors (MOSFETs) keeping in pace with the Moore's law. The primary use of silicides has also evolved from creating reliable contacts for diodes, to generating high-conductivity current paths for local wiring, and lately to forming low-resistivity electrical contacts for MOSFETs. With respect to the choice of silicides for CMOS technology, a convergence has become clear with the self-alignment technology using only a limited number of silicides, namely TiSi@sub 2@, CoSi@sub 2@ and NiSi. The present work discusses the advantages and limitations of TiSi@sub 2@, CoSi@sub 2@ and NiSi with the development trend of CMOS technology as a measure. Specifically, the reactive diffusion and phase formation of these silicides in the three terminals of a MOSFET, i.e. gate, source and drain, are analyzed. This work ends with a brief discussion about future trends of metal silicides in micro/nanoelectronics with reference to the potential material aspects and device structures outlined in the International Technology Roadmap for Semiconductors.