As silicon CMOS devices scale into the nanometer regime, the material set and device structures employed by conventional field-effect transistors (FETs) are beginning to reach their limits. One way to extend the scaling of the FET towards smaller gate lengths (less than 20 nm) is to employ the double-gate device structure.@footnote 1@ While the concept and the device physics of the double-gate FET has been explored for many years,@footnote 2@ the fabrication of the double-gate FET remains difficult.@footnote 3@ Self-alignment of the two gates with respect to each other and to the source and drain doping regions present a very difficult fabrication challenge. In addition, the thin silicon channel thickness required (5 to 10 nm) becomes a key manufacturing challenge as well as a unique opportunity to study fundamental device physics. This paper will review the history and state-of-the-art in double-gate device development, including the planar,@footnote 4,5@ vertical(VRG),@footnote 6@ and FinFET@footnote 7,8@ device configurations. This paper will also review the device physics considerations which drive technology progress from SOI to the ultimate limit of FETs, highlighting the role that double-gate FETs will play in the future. @FootnoteText@@footnote 1@H.-S. P. Wong, D. Frank, P. Solomon, H.J. Wann, J. Welser, Nanoscale CMOS, Proceedings of the IEEE, p. 259, 2001. @footnote 2@T. Sekigawa et al., Calculated threshold voltage characteristics of an XMOS transistor having an additional bottom gate, Solid State Electronics, p. 827, 1984. @footnote 3@H.-S. P. Wong, Beyond the Conventional Transistor, IBM J. Research and Development, p. 133, 2002. @footnote 4@H.-S. P. Wong et al., International Electron Devices Meeting, p. 427, 1997. @footnote 5@K. Guarini et al., International Electron Devices Meeting, p. 425, 2001. @footnote 6@S.-H. Oh et al., International Electron Devices Meeting, p. 65, 2000. @footnote 7@Y. Choi et al., International Electron Devices Meeting, p. 421, 2001. @footnote 8@J. Kedzierski et al., International Electron Devices Meeting, p. 437, 2001.