AVS 47th International Symposium
    Semiconductors Thursday Sessions
       Session SC+EL+SS-ThM

Paper SC+EL+SS-ThM10
Fundamental Connection Between the ESD of H/D at Silicon Surfaces and at Oxide/Silicon Interfaces

Thursday, October 5, 2000, 11:20 am, Room 306

Session: Hydrogen On and In Semiconductors
Presenter: K. Cheng, University of Illinois, Urbana-Champaign
Authors: K. Cheng, University of Illinois, Urbana-Champaign
J. Lee, University of Illinois, Urbana-Champaign
Z. Chen, University of Illinois, Urbana-Champaign
J.-P. Leburton, University of Illinois, Urbana-Champaign
E. Rosenbaum, University of Illinois, Urbana-Champaign
K. Hess, University of Illinois, Urbana-Champaign
J.W. Lyding, University of Illinois, Urbana-Champaign
Correspondent: Click to Email

Parallels can be drawn between electron stimulated desorption (ESD) of hydrogen at silicon surfaces in UHV and the ESD of hydrogen at the oxide/silicon interface in CMOS transistors. In particular, the multiple carrier vibrational heating mechanism for ESD, and the giant hydrogen/deuterium isotope effect play important roles in interface degradation. In this paper we will present results demonstrating the primary role of channel hot carriers in the degradation of the oxide/silicon interface of transistors. Experiments performed on p-channel MOSFET's show essentially no isotope effect for the creation of interface traps when carriers are injected into the oxide. However, a large isotope effect, consistent with vibrational heating, is observed when carriers flow along the oxide/silicon interface. One key difference between a H-passivated silicon surface and a H-passivated oxide/silicon interface is that there is a distribution of Si-H bond strengths at the interface due to variations in the amorphous oxide matrix. Experimental results will be presented which directly measure this distribution as well as show its ramifications in terms of rapid interface trap creation. The significance of this study comes from the fact that it is still a widely held view that the dominant transistor degradation mechanisms arise from carrier injection into the oxide, and therefore will be scaled away as industry trends progress. However, by performing new experiments and using basic surface science as a setting for their interpretation, we are able to show that there are fundamental problems with this view. Our results are supported by the fact that even state-of-the-art 0.18mm, 1.5 V CMOS chips show hundreds times lifetime improvement when hydrogen is substituted by deuterium.