MOS device physics and technology are rapidly approaching some fundamental limits as device dimensions are scaled below 100 nm. Fundamental tunneling limits to SiO2 gate oxide are approaching as oxide thickness scales below 2 nm. Low resistance source/drain contacts are becoming increasingly difficult as junction depths decrease and required doping densities approach or exceed solid solubility limits. In order to address these issues, a new cooperative research center was established in 1998, the SRC/SEMATECH Front End Processes Research Center. The Center seeks to bring together research in three areas: (a) Fundamental materials and interface physics and chemistry, (b) Process integration and demonstration and (c) Rapid transfer of technology to industry and equipment companies. To effectively integrate such research efforts, requires new paradigms for cooperative university research and this presentation will discuss how this is being approached within the SRC/SEMATECH Research Center.