AVS 46th International Symposium
    Electronic Materials and Processing Division Tuesday Sessions
       Session EM-TuA

Paper EM-TuA9
Deposition of ZrO@sub 2@/SiO@sub 2@ Alloys by 300° Remote Plasma Processing for Alternative High-K Gate Dielectrics in Aggressively Scaled CMOS Devices

Tuesday, October 26, 1999, 4:40 pm, Room 608

Session: High Dielectric Constant Materials and Thin Oxides
Presenter: R. Therrien, North Carolina State University
Authors: R. Therrien, North Carolina State University
B. Raynor, North Carolina State University
D. Wolfe, North Carolina State University
G. Lucovsky, North Carolina State University
Correspondent: Click to Email
Stimulated by targeted performance goals for aggressively-scaled CMOS devices, there has been much interest in alternative gate dielectric materials to replace SiO@sub 2@. The choice of materials is based on identifying insulating oxides with dielectric constants greater than SiO@sub 2@, so that physically-thicker films, anticipated to have reduced direct tunneling, will be equivalent to thinner oxides. This paper describes the deposition of ZrO@sub 2@/ SiO@sub 2@ alloy films by 300°C remote plasma-assisted CVD. This approach has two potential advantages with respect to conventional thermal CVD. First, by injecting the Zr precursor, Zr(IV) t-butoxide, and the Si precursor, silane, downstream from the plasma region, and driving the CVD reaction with active O-species extracted from an upstream O@sub 2@/He plasma, complete oxidation of Zr and Si has been confirmed by on-line AES and off-line FTIR. Films prepared in this way are amorphous as-deposited, as determined from FTIR and electron diffraction, and more importantly remain amorphous up to at least 900°C after annealing in an inert ambient. This paper describes the deposition process, and identifies the way in which the relative concentration of ZrO@sub 2@ to SiO@sub 2@ has been controlled to achieve deposition of films approaching the compound ZrSiO@sub 4@ composition. Other properties of these films relative to their role as a replacement dielectrics are discussed; e.g., optical studies of the band-gap, and electrical capacitance-voltage and current-voltage characteristics are presented. These allow us to obtain i) the static dielectric constant, ii) the conduction band offset energy with respect to Si and iii) the tunneling electron mass. Based on these measurements, ZrO@sub 2@/SiO@sub 2@ alloys in conjunction with hyper-thin (~0.5 nm), nitrided SiO@sub 2@ interfacial layers can be used to scale the oxide-equivalent dielectric thickness down to about 1 nm.