AVS 45th International Symposium
    Thin Films Division Tuesday Sessions
       Session TF-TuA

Paper TF-TuA1
Real Time Ellipsometry Study the Deposition of Barium Strontium Titanate Thin Films

Tuesday, November 3, 1998, 2:00 pm, Room 310

Session: In-situ Characterization of Thin Films
Presenter: Y. Gao, University of North Carolina, Chapel Hill
Authors: Y. Gao, University of North Carolina, Chapel Hill
A. Mueller, University of North Carolina, Chapel Hill
E.A. Irene, University of North Carolina, Chapel Hill
O. Auciello, Argonne National Laboratory
A.R. Krauss, Argonne National Laboratory
Correspondent: Click to Email

(Br, Sr)TiO@sub 3@ (BST) has been considered to be a candidate high K dielectric material in dynamic random access memory(DRAM) capacitors.@footnote 1@ However, the interface layer formed between the BST thin film and substrate is an obstacle to obtain the desired dielectric constant and/or leakage current level for high density DRAM applications. Therefore, a clear understanding and then control of the interface reaction between a high K dielectric film and the substrate is tantamount for further progress in high K film technology. In previous work@footnote 2@ in our laboratory, the oxygen extraction and interface reactions of YBCO superconductor thin films on different substrates have been studied using real time ellipsometry. The results of this study comprise information on film growth kinetics and the oxygen in- and out- diffusion mechanism. Presently a similar study is ongoing on the interface reaction in ion sputtered BST thin films on Si substrates. The results of this study to be presented include: 1. real time film growth kinetics 2. sensitivity of bulk film composition to oxygen background pressure 3. interface reactions with Si and with various buffer layers 4. static and high frequency dielectric constants as well as leakage currents for BST films from various growth conditions 5. optical properties, composition, structure and morphology of BST films from various growth and post-deposition annealing conditions. @FootnoteText@ @footnote 1@D.E. Kotecki, Semiconductor International, Nov. 1996, pp109-116; @footnote 2@A. Michaelis and E.A. Irene et. al, Journal of Applied Physics, June 15, (1998).