AVS 45th International Symposium
    Electronic Materials and Processing Division Thursday Sessions
       Session EM1-ThA

Invited Paper EM1-ThA5
Roughness at Si/SiO@sub 2@ Interfaces and Silicon Oxidation

Thursday, November 5, 1998, 3:20 pm, Room 314/315

Session: Dielectrics
Presenter: X. Chen, Argonne National Laboratory
Authors: X. Chen, Argonne National Laboratory
J.M. Gibson, University of Illinois, Urbana
Correspondent: Click to Email
Roughness at Si/SiO@sub 2@ interfaces and silicon oxidation With a plan-view transmission electron microscopy technique to directly image buried Si/SiO@sub 2@ interfaces, we studied the interface roughness resulting from the oxidation process. Our results show that thermal annealing in nitrogen at 900 C can dramatically remove the interface roughness for Si(100)/SiO@sub 2@ interfaces.(Xidong Chen and J. M. Gibson Appl. Phys. Lett. 70, 1462 (1997)) In contrast, Si(111)/SiO@sub 2@ interfaces, which tend to be smoother than Si(100)/SiO@sub 2@ interfaces, are not affected by annealing. A model to link interface roughness and silicon oxidation kinetics was developed. This model not only qualitatively explains the difference between Si(111) and Si(100) interfaces that we saw but also shows that oxidation kinetics is the origin of the interface roughness. Hence, it might be a new approach to understand oxidation kinetics by studying interface roughness.