AVS 45th International Symposium
    Electronic Materials and Processing Division Thursday Sessions
       Session EM+PS-ThM

Paper EM+PS-ThM8
Patterning of Reactively Sputtered Tantalum Pentoxide, a High Epsilon Material, by Plasma Etching

Thursday, November 5, 1998, 10:40 am, Room 314/315

Session: Processing of High K Dielectrics for DRAMs
Presenter: H.-O. Blom, Uppsala University, Sweden
Authors: L.B. Jonsson, Uppsala University, Sweden
F. Engelmark, Uppsala University, Sweden
J. Du, Uppsala University, Sweden
C. Hedlund, Uppsala University, Sweden
U. Smith, Ericsson Components AB, Sweden
H.-O. Blom, Uppsala University, Sweden
Correspondent: Click to Email
The large size of integrated capacitors is a problem today. The capacitors can easily cover a major part of the total chip area. By using a high epsilon material as the dielectric material in the capacitor the size can be reduced significantly. One very promising candidate is Tantalum pentoxide (Ta@sub2@O@sub5@) which has an epsilon of 25 compared to Silicon dioxide which has 3.9. In order to make integrated capacitors the Tantalum pentoxide must be patterned. We have investigated and optimized dry etching processes for realizing a complete capacitor structure. One process for etching the Tantalum pentoxide on a back contact made of poly-silicon and one process for etching contact holes, in silicon dioxide, down to the Tantalum pentoxide. Data from Reactive Ion Etching (RIE) as well as for Inductively Coupled Plasma (ICP) processes will be presented.