| AVS 62nd International Symposium & Exhibition | |
| Selective Deposition as an Enabler of Self-Alignment Focus Topic | Thursday Sessions |
| Session SD+AS+EM+PS-ThA |
| Session: | Process Development for Selective Deposition and Self-aligned Patterning |
| Presenter: | Florian Gstrein, Intel Corporation |
| Correspondent: | Click to Email |
Top-down patterning techniques based on optical lithography have made consumer electronics ever more powerful, ubiquitous and affordable. This is largely due to the ability of lithographic techniques to transfer trillions of mask features to wafers at defect densities approaching virtually zero in high-volume manufacturing. While the resolution of optical lithography tools is typically considered to be the main challenge for continued device scaling, it is actually accurate pattern placement, which has emerged as the biggest concern. Novel bottom-up patterning approaches such as selective deposition are needed to overcome shortcomings in pattern placement accuracy.
The talk will first outline the challenges patterning processes based on 193i pitch division and EUV lithography face in terms of alignment accuracy and how complementary patterning techniques such as selective deposition can reduce pattern placement errors. One of the great challenges of selective deposition is defect mitigation, especially as the sensitivity to killer defects increases as device dimensions scale. Defect mitigation requires a fundamental understanding of the chemical selectivity of surfaces. While molecules can recognize chemical functionality on a surface, selective deposition processes based on atomic layer deposition (ALD) or chemical vapor deposition (CVD) are exceedingly rare and largely limited to specific precursors and substrates. For metal deposition, inherent selectivity was achieved through judicious precursor ligand design. Experimental results will be presented in the context of a theoretical investigations aimed at calculating the kinetic barriers that govern the selectivity of metal deposition. The use of self-assembled monolayers (SAMs) as passivants and/or blocking layers for subsequent deposition is an attractive way of overcoming the non-selectivity of many CVD or ALD processes. Here, the critical parameters for selective blocking are choice of the terminal group, surface termination, carbon chain length, and proper precursor choice. Using SAMs, selective deposition of dielectrics with respect to a variety of surfaces was achieved. The talk will conclude with our vision of how defects can be mitigated: It comprises a fundamental understanding of the chemical nature of the surface, precursors with high kinetic barriers for defect formation, passivation of defect nucleation sites, and the removal of defects post deposition. Selective deposition, if properly resourced and developed, can provide powerful means to future scaling and is one way of ensuring that patterning will continue to support Moore’s Law in the foreseeable future.