AVS 62nd International Symposium & Exhibition | |
Plasma Science and Technology | Monday Sessions |
Session PS-MoM |
Session: | Advanced FEOL/Gate Etching |
Presenter: | Joshua LaRose, TEL Technology Center, America, LLC |
Authors: | J.D. LaRose, TEL Technology Center, America, LLC B. Pfeifer, Tokyo Electron V. Gizzo, Tokyo Electron N. Joy, TEL Technology Center, America, LLC N.M. Russell, TEL Technology Center, America, LLC |
Correspondent: | Click to Email |
Abstract
Sub-14nm CMOS requires a demanding level of integrated thickness control at several critical layers in the fabrication process in order to meet functional and parametric yield/Cpk goals. Gas cluster ion beam (GCIB) etching is becoming increasingly adopted to meet this need by using precise corrective etching with location specific processing (LSP) to meet within-wafer and wafer-to-wafer control requirements. LSP etch correction may be driven by any input map delivered to the tool via factory automation, or may be driven by on-board integrated metrology. In either case the extent to which a uniformity pattern can be corrected may be limited by the length scale of non-uniform features as compared to the size of the beam, and the ability of the metrology sampling plan to resolve the features. Here we characterize in some detail, the influence of sampling density and non-uniformity length scale on LSP resolution capability.
LSP was able to substantially reduce the standard deviation of a model incoming non-uniformity map for features with > 8 mm length scale, and to adequately resolve such features, requires a metrology sampling plan corresponding to > 89 points on a 300 mm wafer. For wafer-edge non-uniformity, we show similar capability to resolve features > 10 mm by LSP, with sufficient metrology sampling density, and introduce a hybrid edge model scheme that can enable improved resolution of edge features with as few as 37 metrology points. Here we describe in detail the techniques used to determine the resolution performance, summarize results from several relevant cases, and present clear guidelines on sampling strategies for LSP etching.