Paper SE+PS-ThM6
Si₃N₄ Spacers Etching in Synchronized Pulsed CH₃F/O₂/He/SiF₄ Plasmas

Thursday, October 31, 2013, 9:40 am, Room 203 C

Gate spacers are used in submicron metal oxide semiconductor field effect transistor (MOSFET) in order to precisely define the channel length with abrupt junction geometry and eventually to tailor the electrical characteristics of the MOSFET transistors. Therefore, spacer etch process is considered to be one of the most critical processes of CMOS technologies.The Si₃N₄ spacer etching process requires a high etch selectivity to Si so that Si₃N₄ etching can be stopped on the Si surface without silicon substrate consumption in source/drain (S/D) regions of the MOSFET transistor. Silicon loss in S/D regions during spacer etching causes substrate bias dependent leakage and etch induced damage in the silicon surface raises the resistance of ultra-shallow junctions. More recently, the introduction of an ultra-thin Si channel in 28 nm FDSOI technology brought more aggressive requirements in terms of Si consumption. At the same time, plasma etch processes are reaching their limits regarding etch selectivity and profile control at the nanometer scale. In this study, we investigate the combination of synchronized pulsed plasma technologies and the addition of a Si-containing gas, SiF₄, with the objective to improve spacer etch process performance.

The experiments are performed in a 300mm AdvantEdge^TM etch tool from Applied Materials. The inductively coupled plasma is sustained by two RF generators (13.56 MHz) to create the plasma and to polarize the wafer, using synchronous pulsing at different frequencies and duty cycles. Moreover, a Theta300 angle resolved XPS system from Thermo Scientific is connected under vacuum, allowing quasi in-situ analysis of etched samples.

In this work, we investigate the effect of SiF₄ addition in a synchronized pulsed CH₃F/O₂/He plasma. In a previous study, we have already shown that high Si₃N₄/Si selectivity is obtained by oxidizing the silicon surface during the landing of the nitride etching process on the silicon surface. When the plasma is pulsed at 1 kHz with a duty cycle of 10%, spacer profiles are improved and the oxidized thickness is significantly reduced but still generates a Silicon recess of 0.5 nm. With 5sccm SiF₄ added to the plasma gas phase, we observe a SiO_x deposition at the Si surface without any Si consumption, showing that the etch stop is obtained by the deposition of a SiO_x layer originated from the plasma gas phase.