| AVS 58th Annual International Symposium and Exhibition | |
| Thin Film Division | Thursday Sessions |
| Session TF1-ThM |
| Session: | Post-Deposition Processing and Characterization of Thin Films |
| Presenter: | Els Van Besien, IMEC, Belgium |
| Authors: | E. Van Besien, IMEC, Belgium N. Jourdan, IMEC, Belgium L. Zhao, Intel assignee at IMEC, Belgium K. Croes, IMEC, Belgium Y.K. Siew, IMEC, Belgium S. Van Elshocht, IMEC, Belgium Zs. Tőkei, IMEC, Belgium |
| Correspondent: | Click to Email |
Diffusion barrier layers with a uniform thickness and good step coverage in narrow lines are needed to enable the continuing scaling of Cu interconnects. Since physical vapor deposition (PVD) processes have limitations in respect of conformality, atomic layer deposition (ALD) and chemical vapor deposition (CVD) might become the preferred alternatives. Among others, Mn-based CVD barriers have been proposed [1], but up to now, Cu barrier properties for such films have not been proven electrically.
In this study, MnOx layers were deposited by CVD, on top of an O3/TEOS SiO2 layer. Deposition was done at two different temperatures: 200 °C and 350 °C. The effect of a post-plating anneal of one hour at 300 °C or 430 °C was studied. A test structure based on planar capacitors was used, in which first wide areas were patterned, followed by the deposition of the oxide and CVD MnOx layers, metallization, and CMP, respectively [2]. After passivation, voltage ramp (at 25 °C and 100 °C) and TDDB measurements (at 100 °C) were conducted. The electrical data were compared with those from a known good TaN/Ta-barrier reference system.
Voltage ramp measurements at 25 °C show a similar behaviour for all Mn-based films under study, except for the one deposited at 350 °C, with a post-plating anneal at 430 °C. For the latter a leakage current of about 1 order of magnitude lower is found, comparable to the leakage current of our TaN/Ta reference. For the film deposited at 200 °C, and annealed at 430 °C, voltage ramp measurements only showed shorts.
TDDB lifetimes were in all cases higher than for a reference without barrier, but lower than for a TaN/Ta reference. For the Mn-based films deposited at 350 °C, a post-plating anneal at 430 °C clearly improved the reliability properties. In this case, the extrapolated lifetime at user conditions (using the E-model), is above 10 years. A γ value of -3.4 cm/MV was found. However, for the films deposited at 200 °C, an anneal at 300 °C already degraded the reliability properties.
In conclusion, voltage ramp and TDDB measurements on planar capacitors structures show that, with optimised processing, CVD Mn-based barriers are promising candidates as Cu barriers in advanced interconnects.
[1] K. Neishi, S. Aki, K. Matsumoto, H. Sato, H. Itoh, S. Hosaka, J. Koike, Appl. Phys. Lett. 93 (2008) 032106
[2] L. Zhao, Zs. Tökei, G. Giai Gischia, M. Pantouvaki, K. Croes, G. Beyer, IEEE International Reliability Physics Symposium, 2009, 848-850