AVS 58th Annual International Symposium and Exhibition | |
Thin Film Division | Wednesday Sessions |
Session TF1+EM-WeA |
Session: | Nonvolatile Memory |
Presenter: | Christian Wenger, IHP, Germany |
Authors: | Ch. Wenger, IHP, Germany T. Bertaud, IHP, Germany Ch. Walczyk, IHP, Germany D. Walczyk, IHP, Germany M. Malgorzata, IHP, Germany |
Correspondent: | Click to Email |
The integration of various functionality to (Bi)CMOS circuits is in the focus of the “More than Moore” approach. Here, we demonstrate the incorporation of nonvolatile memories (NVM) into the Back end of line (BEOL) of Bi(CMOS) circuits. The added functionalities open new technological possibilities for high value microelectronics systems.
Embedded nonvolatile memories (NVM) with high-density, high-speed, and low-power are attractive for a growing number of applications. One promising candidate for next-generation nonvolatile memories is based on the electrically switchable resistance change between a high (OFF-state) and a low (ON-state) resistive state of a metal-insulator-metal (MIM) structure. This approach is often termed resistance random access memory (RRAM) technologies. Due to the cost effectivity and BEOL compatibility with (Bi)CMOS technologies, this approach is highly attractive. By combining the MIM devices (R) with selection transistors (T), the 1T-1R cells offer good scalability, long retention time, and rapid read/write times. In this letter, the reliable bipolar resistive switching of TiN/HfO2/Ti/TiN devices embedded into 1T-1R cells is demonstrated.
The current-voltage (I-V) characteristics of the TiN/HfO2/Ti/TiN diodes and 1T-1R cells were studied by DC voltage sweep measurements. By applying a positive voltage at the top electrode, the resistance is reduced for V > VSet. The device can be switched back into the OFF-state when a negative voltage is applied beyond VReset. In case of the 1T-1R cell, the forming and set processes can be controlled by changing the gate voltage (VG) of the select transistor.