AVS 58th Annual International Symposium and Exhibition
    Nanomanufacturing Science and Technology Focus Topic Tuesday Sessions
       Session NM+NS+MS-TuA

Invited Paper NM+NS+MS-TuA7
The Metal-Oxide-Metal Vacancy Drift Memristor - A CMOS Compatible, High Speed, Non-Volatile Switch for Universal Memory and Storage

Tuesday, November 1, 2011, 4:00 pm, Room 207

Session: Manufacturable Nanoscale Devices and Processes
Presenter: John Paul Strachan, Hewlett-Packard Labs
Authors: R.S. Williams, Hewlett-Packard Labs
J.P. Strachan, Hewlett-Packard Labs
Correspondent: Click to Email
The existence of the fourth passive circuit element was proposed by Prof. Leon Chua of UC Berkeley in 1971 from fundamental symmetry arguments to augment the familiar resistance, inductance and capacitance equations. Although he showed that such a ‘memristor’ had many interesting and useful circuit properties, until 2008 no one knew if such a circuit element existed or not. In fact, researchers had been making and studying memristors for decades without knowing it - examples are resistive RAM devices, STTRAM devices and phase change memory devices. At HP, we have focused primarily on metal-oxide-metal bipolar resistive switches. Memristance arises naturally in these systems via coupling of electronic and ionic transport in thin semiconducting metal-oxide films under an external bias voltage. Simple analytical models show that memristance becomes much more important as the thickness of the active device region decreases, and thus memristors are mainly nanoscale structures. Memristor theory serves as the foundation for understanding a wide range of hysteretic current-voltage behavior, including both unipolar and bipolar switching, observed over the past 50 years. We have built nanoscale titanium dioxide and tantalum pentoxide memristors in our laboratory and have demonstrated both their fundamental electrical properties and several potential uses. They can be integrated into electronic circuits using conventional fabrication techniques and materials available in standard CMOS fabrication facilities. I will discuss recent results on such topics as device switching speed, endurance, measurements required to parameterize a physics-based SPICE model, and 3D stacking of memristive crossbars.