AVS 56th International Symposium & Exhibition
    Manufacturing Science and Technology Thursday Sessions
       Session MS+GR+MI-ThM

Invited Paper MS+GR+MI-ThM11
Graphene Nanoelectronics for Post-CMOS Logic Switches

Thursday, November 12, 2009, 11:20 am, Room C3

Session: Manufacturing Issues for Beyond CMOS Nanoelectronics
Presenter: C.Y. Sung, IBM T.J. Watson Research Center
Correspondent: Click to Email

Electron charge has been the computational state variable for decades. However, a new switch is urgently needed because scaling may fail to keep providing performance-cost benefits. We report the scaling limits and graphene research in monolayer synthesis, transistor engineering and new state variable logic switches. We demonstrate graphene nanoelectronics feasibility by monolayer-control wafer-scale synthesis, high performance device fabrication, bandgap engineering, for low-power, low noise performance and process integration. Computation with less power requires switches with alternative state variables. Graphene, with many desirable properties, emerge as a promising post-CMOS logic candidate.