| AVS 55th International Symposium & Exhibition | |
| Electronic Materials and Processing | Wednesday Sessions |
| Session EM-WeM |
| Session: | High-K Oxides and High Mobility Substrates |
| Presenter: | L. Yu, Rutgers, The State University of New Jersey |
| Authors: | L. Yu, Rutgers, The State University of New Jersey T. Feng, Rutgers, The State University of New Jersey Q. Jiang, Rutgers, The State University of New Jersey H.D. Lee, Rutgers, The State University of New Jersey C.L. Hsueh, Rutgers, The State University of New Jersey A.S. Wan, Rutgers, The State University of New Jersey D.D.T. Mastrogiovanni, Rutgers, The State University of New Jersey Y. Xu, Rutgers, The State University of New Jersey T. Gustafsson, Rutgers, The State University of New Jersey E. Garfunkel, Rutgers, The State University of New Jersey |
| Correspondent: | Click to Email |
High-k dielectrics have been adapted as gate oxide in order to prolong the Moore’s law of CMOS transistor scaling to a critical length of 45 nm and beyond. Also, replacing Si with a higher mobility material (for example, Ge and III-Vs) as transistor channel is expected to further enhance the transistor performance. Thus, the idea of combining those two advances in one process has attracted many research efforts from both academia and industry. However, the task has been difficult due to the lack of proper treatment to the oxide/channel interface. The defect states at the interface or inside dielectrics can enhance carrier scattering and degrade device threshold voltage. Further more, the chemical instability and compatibility at the interface are often detrimental to device performance. Several studies, including ours, showed that chemical cleaning and subsequent passivation (for example, with ammonium sulfide) prior to dielectrics deposition on both Ge and GaAs channels can greatly reduce the interface state density (Dit). We have established tools that enable ALD and sputtering deposition of the CMOS gate stacks along with in.situ. characterization by MEIS (Medium Energy Ion Scattering) and XPS. It allows us to determine, with high spatial resolution, the composition, structure and thermal stability of gate stacks on various channels. We will present the in. situ. characterization results of Al2O3 and HfO2 based gate stacks on chemically treated Ge and GaAs surface. These results will be directly correlated with studies of gate stack electrical properties and electronic structure.