AVS 55th International Symposium & Exhibition
    Electronic Materials and Processing Thursday Sessions
       Session EM+NC-ThM

Invited Paper EM+NC-ThM9
Reliability of III-N Electronic Devices

Thursday, October 23, 2008, 10:40 am, Room 210

Session: Contacts, Interfaces, and Defects in Semiconductors
Presenter: M. Shur, Rensselaer Polytechnic Institute
Correspondent: Click to Email

III-N materials system has a much larger dislocation and defect densities than more conventional semiconductors, such as silicon or III-V materials, and III-N field effect transistors operate at much higher voltages and/or current densities. As a consequence, device reliability is one of major concerns for III-N semiconductor technology. In GaN-based field effect transistors, reliability mechanisms are linked to hot electron trapping, trap creation in high electric fields at the gate edges (especially at the gate edge closer to the drain), and to the gate leakage current. The electric field activated carrier trapping in the gate-to-drain spacing of AlGaN/GaN HFET is primarily responsible for the current reduction at RF frequencies (so-called current collapse, or RF dispersion. The defect states creation at the gate edges and in the drain-to-gate spacing depends on the device temperature. At relatively low temperatures, these defect states are created due to impurity anneal. At higher temperatures, crack and dislocation creation becomes the dominant mechanism leading to the permanent device failure. As a consequence, an extrapolation of high temperature accelerated reliability tests to lower temperatures might be inaccurate. Except for the failure mechanism related to the gate leakage current, other failure and performance degradation mechanisms are related to a high electric field at the drain edge of the device channel and in the drain-to-gate spacing adjacent to the gate. (Therefore, GaN-based RF switches operating at zero DC drain bias and having insulated gate structure (MOSHFETs and MISHFETs) do not have reliability problems.) Field plates and dual field plates diminish the maximum electric field in the device channel improving reliability. Another approach, still to be explored, is based on using Field Controlled Electrode at the drain, which a kind of a field plate attached to the drain, rather than to the gate or source. Leaky passivation helps discharging the trapped charge diminishing the current collapse. Optimization of buffer doping also improves reliability. These design approaches, using better quality substrates, and improving materials quality of III-N epitaxial films will allow to achieve long life times and stable performance for high power and high frequency GaN-based field effect transistors.