| AVS 54th International Symposium | |
| Nanometer-scale Science and Technology | Friday Sessions |
| Session NS-FrM |
| Session: | Nanolithography and Nanoprocess Technology |
| Presenter: | M.Y. Simmons, University of New South Wales, Australia |
| Correspondent: | Click to Email |
One driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce device sizes below 10nm. In this talk we demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity crystal growth. A key aspect of being able to build single atom devices is the ability to distinguish single atoms on and in the silicon surface. We demonstrate a detailed understanding of the surface chemistry to identify and control individual P atoms, using phosphine as a dopant source in silicon.1 We can place individual phosphorus atoms in silicon at precise locations2 and encapsulate them in epitaxial silicon with minimal diffusion and segregation of the dopants.3 Separate studies have confirmed the range of electrical transport characteristics that can be achieved using phosphorus as a planar, buried dopant in the absence of any lithographic patterning by STM.4 We then demonstrate that we can pattern this planar dopant layer using STM lithography and encapsulate with low temperature silicon epitaxy without lateral diffusion of the dopants out of their lithographic regions. Electrical device characteristics at low temperatures confirm the presence of the lithographic patterning as we observe a cross-over from 2D to 1D transport in the phase coherence length.5 Using this process we have fabricated conducting nanoscale wires with widths down to ~8nm, tunnel junctions, single electron transistors and arrays of quantum dots in silicon.6 We will present an overview of the devices that have been made with this technology and highlight some of the challenges to achieving atomically precise devices.
1 H.F. Wilson et al., Physical Review Letters 93, 226102 (2004).
2 S. R. Schofield et al., Physical Review Letters 91, 136104 (2003).
3 K.E.J. Goh et al., Applied Physics Letters 85, 4953-4955 (2004).
4 K.E.J. Goh et al., Phys. Rev. B 73, 03541 (2006).
5 F.J. Rueß et al., Nano Letters 4, 1969 (2004).
6 F.J. Rueß et al., Small 3, 567 (2007); Nanotechnology 18, 044023 (2007); Phys. Rev. B Rapid 85, 121303 (2007).